Store read units

ABSTRACT

Read unit suitable for reading a storage element whose stored information is available in the form of a voltage at an information terminal, said unit comprising a second transistor controlled by a first transistor, the latter being rendered conducting when the former is cut off for conducting away the charge accumulated in the base of the second transistor.

United States Patent Camerik STORE READ UNITS [72] Inventor: FerdinandCamerik, Emmasingel, Eindhoven, Netherlands [73] Assignee: U.S. PhilipsCorporation, New York, NY. [22] Filed: Jan. 14, 1970 [21] Appl. No.:2,825

[451 Jan. 25, 1972 3,510,685 5/1970 Watanabe ..307/2 1 8 F ORElGNPATENTS OR APPLICATIONS 1,192,250 2/1964 Primary ExaminerDonald D.Forrer Assistant Examiner-David M. Carter Anorney-Frank R. Trifari [5 7]ABSTRACT Read unit suitable for reading a storage element whose storedinformation is available in the form of a voltage at an informationterminal, said unit comprising a second transistor controlled by a firsttransistor, the latter being rendered conducting when the former is cutoff for conducting away the charge accumulated in the base of the secondtransistor.

4 Claims, 5 Drawing Figures Germany ..307/299 PATENTED JANZS i972 UINVENTOR.

FERDINAND CAMERIK AGENT sroru: REA!) UNITS The invention relates to aread unit for scanning the information appearing in the form of abivalent voltage signal at an information terminal, said unit for beingselected by bivalent signals comprising an input terminal which iscoupled through a first resistor with the base of a first transistor,one emitter of which is connected to the information terminal and thecollector of which isconnected to the base of a second transistor, whoseemitter is coupled with a source of constant potential and whosecollector is connected on the one hand to an output terminal and on theother hand through a second resistor to a terminal of a supply source.

TI-Ie problem of scanning bivalent voltage signals is involved interalia in semiconductor stores in which the storage elements are formed bybistable semiconductor devices. For this purpose a read unit of the kindset forth has become known from Electronics,"Apr. 4, 1966, page 122.

In this known circuit arrangement the possibility of deriving theinformation appearing in the form of a bivalent voltage signal at theinformation terminal from the output terminal is provided by cutting offthe second transistor at the appearance of one of the signal values andby driving it in the saturation state at the appearance of the othersignal value. In the latter state, however, a great charge will beaccumulated in the base of the transistor. Under given conditions it ispossible to conduct away this charge only by leakage currents. Thisinvolves the disadvantage that under said conditions the time requiredfor switching over from a low output voltage to a high output voltage islong. This long switching time implies that voltages induced from theoutside exert a great influence on the output voltage so that there is anarrow range of anti-interferences. Whereby the anti-interference marginis defined as Vs/Vt.

Vs is the maximum value of the input voltage for which the outputvoltage does not charge, Vt is the maximum voltage variation of theoutput voltage.

The invention has for its object to provide under any condition a shortswitching time of the read unit mentioned above and hence to improve theenlargement of the anti-interence range.

The read unit according to the invention is characterized in that theinput terminal is connected to a second emitter of the first transistorfor temporarily rendering the first transistor conducting when thesecond transistor is cut off.

The invention will be described more fully with reference to theembodiments shown in the Figures, in which the same references are usedfor corresponding elements.

FIG. 1 shows a known read unit.

FIG. 2 shows an embodiment of a read unit in accordance with theinvention.

FIGS. 3, 4 and 5 show embodiments of the invention, which are extendedas compared with the embodiment shown in FIG. 2. t

The read unit shown in FIG. 1 comprises a storage element G, whichcontains information in the form of a bivalent voltage signal. Thevalues of these voltages are unambiguously determined and they areeither low, then corresponding to ground potential, or high, thencorresponding to the positive voltage of the supply source.

These signal voltages may be derived from an information terminal of thestorage element G. For this purpose the information terminal isconnected to an emitter of the multiemitter transistor T,, whose base isconnected through a first resistor R, to a first input terminal y and asecond emitter of which is connected to a second input terminal x, whilethe collector thereof is connected to the base of a second transistor TThe emitter of the transistor T is connected to ground and the collectoris connected on the one hand to the output terminal U and on the otherhand through the resistor R to the positive terminal V,, of a supplysource (not shown). For selection by coincidence the input terminals xand y receive bivalent signals, a high value of the signal denotingherein a high volt- -age,,i.e., the positive voltage of the supplysource (not shown),

and a low value of the signal denoting a low voltage, i.e., groundpotential. If the voltage at the input terminal y is low, the transistorT, will be cut off independently of the value of the voltage at theinput terminal x, so that no base current is available for thetransistor T which is thus also cut oil. The output voltage at theterminal U is then equal to the positive voltage of the supply source(not shown). If the voltage at the input terminal y is high and that atthe input terminal x low, the base-emitter junction of the multiemittertransistor T, is conducting. The collector voltage of transistor T, isunder these conditions approximately equal to the voltage at the inputterminal x so that the base voltage of the transistor T is also low andthe transistor T remains cut off. The output voltage of the terminal Uremains high. If a high voltage is applied to the two input terminals xand y, and if the voltage at the information is low, the base-emitterjunction of the multiemitter transistor T, will be conducting, thecollector voltage of transistor T, will be low and the output voltage atterminal U will again be high. However, if the voltages at the inputterminals x and y and at the information terminal are high, thebase-collector junction of transistor T, and the series-connectedbase-emitter junction of transistor T are conducting, so that the latteris driven in the conductive state. This results in a voltage drop acrossthe resistor R so that the output voltage at terminal U is reduced.Consequently, only when the two input voltages are high, the invertedvalue of the voltage of the information stored in the element G willappear at the output terminal U. Since the output voltages may beemployed for driving other circuits, it is required for them to have thesame levels as the voltages of the element G. Moreover, this read unitis integrated in a circuit so that low dissipation is required. In orderto satisfy these requirement, the transistor T is cut off for obtaininga high output voltage and the transistor T is driven in the saturationstate for obtaining a low output voltage. This bottoming results in ahigh charge accumulation in the base of transistor T When the inputvoltage of the terminal y is changed from a high value to a low value,whereas .the input voltage at terminal x is high, the multiemittertransistor T, is cut off and the charge of the base of transistor T, canbe conductedaway only by leakage current. The output voltage of theterminal U then changes slowly from a low value to a high value so thatthe switching time is long. Thus voltages induced from without have agreat influence during this time on the value of the output voltage ofterminal U so that the anti-interference range is narrow.

FIG. 2 shown a read unit in accordance with the invention. The read unitshown in FIG. 1 provides herein the connection of a third emitter of themultiemitter transistor T, to the first terminal y so that voltagevariations at this input terminal are directly transferred to theemitter. The base of the multiemitter transistor T, has a parasiticcapacitance C, to ground. This capacitance, together with the resistorR,, forms a delay element having a time constant C,,R,. A change of thevoltage at the terminal y is passed with a time lag of C R, to the baseof the multiemitter transistor T,. When the voltage at terminal y ischanged from a high to a low value, whereas the voltage at terminal xand at the information terminal is high, the base of the multiemittertransistor T, will be at a high voltage during the time lag C,,R,,whereas the emitter voltage is low so that the multiemitter transistorwill operate as a transistor for said time. The base charge oftransistor T will then be conducted away with an accelerated ratethrough the collector-emitter junction of the multiemitter transistor T,and the input terminal y. As a result the switching time is reduced sothat the range of interference is smaller. If the time lag C,,R, is tooshort for a complete drain of the base charge of transistor T theparasitic capacitance C, may be enhanced.

However, this involves the disadvantage that a switching-on time isintroduced, when the multiemitter transistor T, has to be changed overfrom the cut off state to the conducting state.

The read unit shown in FIG. 3 obviates this disadvantage of I the readunit of FIG. 2. In the read unit of FIG. 3 a third transistor T whosebase-emitter junction is connected between the resistor R, and the baseof the multiemitter transistor T,, is arranged so that the base of thetransistor T is connected to the resistor R, and the emitter thereof isconnected to the base of the multiemitter transistor T,. The collectorof the transistor T is connected through the resistor R to the positiveterminal V, of the supply source (not shown). If the two input voltagesare high and the voltage at the information terminal is high, thetransistor T will be conducting because the base current for thetransistor T passes from the positive tenninal of the supply source (notshown), via resistor R the emitter-collector junction of transistor Tthe basecollector junction of transistor T, and the base-emitterjunction of transistor T The transistor T is then driven in thesaturation state and a great charge is then accumulated in the base ofthis transistor. If only the voltage at the input terminal y is changedfrom a high to a low value, the base of the transistor T will followthis voltage drop with the time lag C,,R,; thus transistor T is cut off,which requires a certain amount of time, after which the base of themultiemitter transistor T, assumes a low voltage. The emitter voltage ofthe multiemitter transistor T,, however, has followed the voltage dropat the input terminal y. The multiemitter transistor T, operates as atransistor for the time C R, plus the time required for the transistorT,, to be cut off and the stored charge will be conducted awaycompletely via the base of transistor T and the collector-emitterjunction of the multiemitter transistor T, to the input terminal y. Thetransistor T is definitely cut off as soon as the base charge isconducted away so that a longer time lag than that strictly required isnot objectionable.

Because the switching-on time of a conventional transistor is muchshorter than the switching-off time, the result of including transistorT in the base circuit of the multiemitter transistor T, is that the basecharge of transistor T is completely conducted away without theintroduction of an additional time lag when the input voltage atterminal y is changed from a low to a high value.

ln practice the switching time was reduced by these measures from 300 to60 nsec.

if the input voltage at terminal y is high and if the input voltage atterminal x is low, the base-emitter junction of the multiemittertransistor T, of these embodiments will be conducting. The collectorvoltage of the multiemitter transistor T, is then substantially equal tothe low emitter voltage so that the base of the transistor T,, which isconnected to the collector of the transistor T,, has a low voltage andthe transistor T will be cut off. Owing to the conducting state of thebase-emitter junction of transistor T,, energy will be dissipated in theread unit, which is advantageous when the unit is integrated. This isobviated by the read unit shown in FIG. 4. This includes a fourthtransistor in the base circuit of the multiemitter transistor T, so thatthe collector of the transistor T is connected to the emitter oftransistor T the emitter of transistor T, is connected to the base ofthe multiemitter transistor T, and the base of transistor T is connectedthrough a resistor R to the input terminal 1:. Also in this casetransistor T is only conducting, when the two input voltages and thevoltage at the information terminal are high. Then a base current willflow for the transistor T, from the positive terminal V, through theresistor R the collector-emitter junction of transistor T,,, thecollector-emitter junction of transistor T the base-emitter junction ofthe multiemitter transistor T, and the base-emitter junction oftransistor T to earth. If the input voltage at the terminals x or y ischanged from a high to a low value, the read unit operates in a similarmanner as that shown in H6. 3. If only the input voltage of terminal .1:is low, transistor T is cut off and the circuit for the base current oftransistor T, is interrupted so that also in this case the multiemittertransistor T, and all other transistors included in the read unit arecut off so that the read unit is better suitable for being integrated.

In the embodiment shown in FIG. 5 the read unit of HO. 3 has removedfrom it the resistor R and the collector of transistor T, directlyconnected to the positive terminal of the supply source and a resistor Rconnected between the emitter of transistor T,, and the base of themultiemitter transistor T,. The operation of this read unit is equal tothat of H6. 3 with the exception that a lower input control current issufi'rcient since the transistor T; is connected as an emitter follower.This has the advantage that a plurality of these inputs may be connectedto one output. It is not essential for the embodiments described, above,with the exception of read unit shown in FIG. 4, for the input terminalat to be provided so that for certain uses this terminal need not beaccessible.

I claim:

1. A read unit for scanning information appearing in the form of abivalent information signal on an information input terminal in responseto bivalent switching signals on a switching signal input terminal,comprising a first multiemitter transistor having a base, a collector,and at least two emitters, a first resistor, means for connecting thebase of the first transistor to the switching signal input terminalthrough the first resistor, means for connecting a first emitter of thefirst transistor to the information input terminal, a second transistorhaving a base, a collector, and an emitter, conductor means forconnecting the collector of the first transistor directly to the base ofthe second transistor, conductor means for connecting the emitter of thesecond transistor to a source of constant potential, conductor means forconnecting the collector of the second transistor directly to an outputterminal, a second resistor, means for connecting the collector of thesecond transistor to a supply voltage input terminal through the secondresistor, and conductor means for connecting the switching signal inputterminal directly to a second emitter of the first transistor through alow impedance path whereby the first transistor is driven temporarilyinto a conductive state in response to a change of condition of thesecond transistor from conductive to a cutoff state.

2. A read unit as claimed in claim 1, further comprising a thirdtransistor having a base, a collector, and an emitter, a third resistor,the means for connecting the base of the first transistor to theswitching signal input terminal through the first resistor comprisingthe emitter and base terminals of the third transistor, the emitter ofthe third transistor being connected to the base of the firsttransistor, and further comprising means for connecting the collector ofthe third transistor to the supply voltage input terminal through thethird resistor.

3. A read unit as claimed in claim 2, further comprising a secondswitching signal input terminal, a fourth transistor, conductor meansfor connecting the second switching signal input terminal directly to athird emitter of the first transistor, a fourth resistor, meanscomprising the collector and emitter of the fourth transistor forconnecting the emitter of the third transistor to the base of the firsttransistor, and means for connecting the base of the fourth transistorto the second switching signal input terminal through the fourthresistor.

4. A read unit as claimed in claim 1, further comprising a thirdtransistor, a third resistor, means for connecting the side of the firstresistor remote from the switching signal input terminal to the base ofthe third transistor, means for connecting the collector of the thirdtransistor to the supply voltage terminal, and means for connecting theemitter of the third transistor to the base of the first transistorthrough the third resistor.

1. A read unit for scanning information appearing in the form of abivalent information signal on an information input terminal in responseto bivalent switching signals on a switching signal input terminal,comprising a first multiemitter transistor having a base, a collector,and at least two emitters, a first resisTor, means for connecting thebase of the first transistor to the switching signal input terminalthrough the first resistor, means for connecting a first emitter of thefirst transistor to the information input terminal, a second transistorhaving a base, a collector, and an emitter, conductor means forconnecting the collector of the first transistor directly to the base ofthe second transistor, conductor means for connecting the emitter of thesecond transistor to a source of constant potential, conductor means forconnecting the collector of the second transistor directly to an outputterminal, a second resistor, means for connecting the collector of thesecond transistor to a supply voltage input terminal through the secondresistor, and conductor means for connecting the switching signal inputterminal directly to a second emitter of the first transistor through alow impedance path whereby the first transistor is driven temporarilyinto a conductive state in response to a change of condition of thesecond transistor from conductive to a cutoff state.
 2. A read unit asclaimed in claim 1, further comprising a third transistor having a base,a collector, and an emitter, a third resistor, the means for connectingthe base of the first transistor to the switching signal input terminalthrough the first resistor comprising the emitter and base terminals ofthe third transistor, the emitter of the third transistor beingconnected to the base of the first transistor, and further comprisingmeans for connecting the collector of the third transistor to the supplyvoltage input terminal through the third resistor.
 3. A read unit asclaimed in claim 2, further comprising a second switching signal inputterminal, a fourth transistor, conductor means for connecting the secondswitching signal input terminal directly to a third emitter of the firsttransistor, a fourth resistor, means comprising the collector andemitter of the fourth transistor for connecting the emitter of the thirdtransistor to the base of the first transistor, and means for connectingthe base of the fourth transistor to the second switching signal inputterminal through the fourth resistor.
 4. A read unit as claimed in claim1, further comprising a third transistor, a third resistor, means forconnecting the side of the first resistor remote from the switchingsignal input terminal to the base of the third transistor, means forconnecting the collector of the third transistor to the supply voltageterminal, and means for connecting the emitter of the third transistorto the base of the first transistor through the third resistor.